Silicon micro-technology
The technological key to high-throughput screening is the combination of patch clamp technology and micro-technology. Micro-technology comprises methods for fabrication of devices in the micrometer scale. It also includes the application of, for example, silicon wafer process technology mainly developed for large-scale integrated electronics. These fields are commonly referred to as microelectronics, opto-electronics, Micro-Electro-Mechanical Systems (MEMS) and micro-fluidics. Micro-fluidics covers liquid handling with applications within chemistry and biology, often described as Micro-Total-Analysis-Systems (µTAS), where an entire lab analysis is performed inside a chip.
Silicon and glass wafer micro-fabrication
Most of the micro-fabrication processes used rely critically on an extremely dust-free environment with well-controlled ambient temperature and humidity. The processes are carried out in so-called clean rooms where such conditions are maintained.
The most important method for micro-fabrication employs photolithography, where the pattern is transferred to a substrate by ultra violet light exposure of a UV-sensitive polymer resist layer through a prefabricated photo mask, followed by development of the pattern. The transferred patterns may comprise subsequent use of photo masks followed by chemical wet etching, reactive ion etching, diffusion and thin film deposition processes.
Other less accurate micro fabrication processes employ computer-controlled micro machining and powder blasting, often used for shaping of glass wafers. Glass and Silicon wafers may eventually be bonded together face to face by employment of anodic bonding processes.
The great advantage of photolithography is the extremely high scalability, i.e. the possibility of generating numerous repeated patterns side by side on a wafer. Separation of those patterns after wafer processing is conventionally obtained by employing a high precision dicing technique with an ultra thin and fast-spinning dicing-blade. The wafer is located on a special dicing foil spanned over a dicing frame during the dicing process, and typically the dice remain on the dicing frame until housing. Special high precision pick and place robots are used for transfer of dice from the dicing frame to the housing. This technology is highly reliable and widely used for the manufacture of integrated circuits in the electronics industry.
Sophion’s Micro-technological patch clamp approach, the QPlate
A large number of silicon chip designs have been developed in collaboration with the Danish Micro Electronic Centre and tested for their ability to be used for patch clamp measurements. For QPlates only conventional and proven Silicon and glass wafer processes are used in order to ensure high reproducibility and stability of the products. Processed Si chips are mounted in high precision injection moulded plastic houses, comprising inlet wells, waste reservoirs and flow channels. The plastic parts are made of proven materials, however the flow channel system is designed in such a way that cells are not exposed to any liquids that upstream has passed through any plastic flow channel. Glass coated flow-channels upstream, polymer flow channels down stream. This approach ensures that “sticky compounds” will not stick to polymer flow channel sidewalls and obscure dose response measurements in QPlates. Silver Chloride electrodes placed on highly insulating ceramic printed circuit boards provide a reliable interface to the parallel amplifier array on the QPatch.
Sophion's integrated micro fluidics enhance scalability
The QPlate constitutes a complete measuring unit, and comprises pipette wells, integrated flow channels, and the measuring site, which is a patch clamp aperture with a diameter of approximately 1-2 micrometer. These self-contained properties combined with Sophion’s advanced patch clamp amplifier arrays provide the system with its extensive scalability.
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